1. Field of the Invention
The present invention relates generally to buffer circuits and more particularly, to buffer circuits that compensate for environmental temperature changes.
2. State of the Art
Electronic products are generally comprised of a plurality of integrated circuits which are coupled to or interfaced with other integrated circuits according to various bus structures or other data interfaces. Interface specifications for coupling integrated circuits with one another specify performance parameters such as voltage and current levels required for digital signals to be accurately and reliably exchanged between two or more integrated circuits. Integrated circuits complying with the interface specifications compatibly exchange information through the use of output buffer circuits which present identifiable logic conditions such as logic low and logic high signal states. Additionally, output buffer circuits provide a mechanism for compatibly interfacing different logic families of integrated circuits.
An example of an output buffer circuit is illustrated with reference to FIG. 1. Generally, an output buffer circuit 10 uses an external voltage level, VCCQ, as a source for generating a logic high signal state. While technological advances result in a generally decreasing signal level for VCCQ, typical voltage ranges may include 1.8 volts to 5.5 volts. Output buffer circuits 10 generally use a lower voltage reference, VSSQ, which may be defined as a lesser positive or negative voltage level and more commonly utilizes a system potential reference or ground as a current sink to implement a logic low signal state. A typical output buffer circuit 10 generally includes complementary transistor devices, one of which is a p-channel pull-up transistor 12 with a source connected to VCCQ and a drain connected to an output terminal 14. Output buffer circuit 10 further includes as another complementary transistor device an n-channel pull-down transistor 16, the drain of which is connected to output terminal 14 with the source terminal connected to VSSQ.
Operationally, a transistor, such as transistors 12 and 16, when implemented as a metal-oxide semiconductor (MOS) transistor, behave as a constant current source when the drain-to-source voltage is greater than or equal to the difference between the threshold voltage and the gate-to-source voltage is in the saturation region. The MOS device, when in the linear region, behaves like a resistor when the drain-to-source voltage is less than the difference between the threshold voltage and the gate-to-source voltage.
Each of the transistors 12, 16, includes a gate input 18, 20 coupled to the respective input signals: pull-up signal and pull-down signal, which controls each transistor 12, 16 at the gate input 18, 20. To generate a logic high signal state on output terminal 14, a pull-up transistor 12 is turned on by logic at gate input 18, while a pull-down transistor 16 is turned off at gate input 20. Accordingly, switching the output to a high logic state enables current to flow from VCCQ to output terminal 14 via pull-up transistor 12 while pull-down transistor 16 assumes a high impedance state. Similarly, a logic low signal state at output terminal 14 is output when the pull-up transistor 12 is turned off, thus generating a high impedance state between output terminal 14 and VCCQ. In such a high impedance state between VCCQ and output terminal 14, current does not flow from VCCQ to output terminal 14. Additionally, pull-down transistor 16 is turned on at gate input 20 allowing current to pass from output terminal 14 to VSSQ, generally implemented as a ground potential. In such a configuration, upper buffer circuit 10 functions as a sink for current at output terminal 14. The gate inputs 18, 20 of pull-up transistor 12 and pull-down transistor 16 are typically coupled to receive a control signal having a logic level that activates one of the transistors and deactivates another one of the transistors.
An output buffer circuit finds application in a semiconductor memory system such as those commonly used in computer or computer-related applications. A typical memory may be used to store data, which may be utilized or processed by other integrated circuits, such as a microprocessor, which couples with the memory system. As memory system designs advance, faster transition times or data rates become factors in the implementation of interfacing specifications requiring advances in interfacing aspects, such as output buffer circuits. As performance and transition times increase, environmental conditions, including temperature variations, introduce variations in the performance of the memory systems. For output buffer circuits implemented in semiconductor devices, it is common for the output buffer circuit to diminish in current drive capacity in response to increases in temperature. The reduction in current drive capability results in reduced operating speeds as signal transitions exhibited at an output terminal of an output buffer circuit transition at a much slower rate. Therefore, since the output buffer circuit transitions at a slower rate, the overall memory system exhibits an overall reduction in performance.
Therefore, because the variations in environmental conditions associated with integrated circuits incorporating output buffer circuits result in unacceptable variations in logic level transition rates, there is a need for an improved output buffer circuit and methodology for accommodating variations in temperature conditions for high data rate devices.